4770 search results - page 555 / 954 » Using System-on-a-Programmable-Chip Technology to Design Emb... |
189
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ARCS
2009
Springer
16 years 1 months ago
2009
Springer
The disparity between microprocessor clock frequencies and memory latency is a primary reason why many demanding applications run well below peak achievable performance. Software c...
152
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DAC
2007
ACM
16 years 7 months ago
2007
ACM
We propose a design and optimization methodology for high performance and ultra low power digital applications on flexible substrate using Low Temperature Polycrystalline Silicon ...
151
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ISLPED
2005
ACM
16 years 2 days ago
2005
ACM
Tuning a configurable cache subsystem to an application can greatly reduce memory hierarchy energy consumption. Previous tuning methods use a level one configurable cache only, or...
350
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FCCM
2011
IEEE
14 years 10 months ago
2011
IEEE
—The problem of automatically generating hardware modules from a high level representation of an application has been at the research forefront in the last few years. In this pap...
191
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FAST
2011
14 years 10 months ago
2011
The predicted shift to non-volatile, byte-addressable memory (e.g., Phase Change Memory and Memristor), the growth of “big data”, and the subsequent emergence of frameworks su...