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ASYNC
2003
IEEE
86views Hardware» more  ASYNC 2003»
15 years 10 months ago
A High-Speed Clockless Serial Link Transceiver
We present a high-speed, clockless, serial link transceiver for inter-chip communication in asynchronous VLSI systems. Serial link transceivers achieve high offchip data rates by ...
John Teifel, Rajit Manohar
CASCON
1996
154views Education» more  CASCON 1996»
15 years 6 months ago
Navigating the textual redundancy web in legacy source
Understanding the source, data, and documentation files associated with legacy systems in preparation for maintenance or reengineering is an increasingly important problem for man...
J. Howard Johnson
INFORMATICALT
2007
101views more  INFORMATICALT 2007»
15 years 4 months ago
Internationalization of Compilers
Internationalization of compilers and localization of programming languages is not a usual phenomenon yet; however, due to a rapid progress of software and programming technologies...
Valentina Dagiene, Rimgaudas Laucius
HCI
2011
14 years 8 months ago
A Methodical Approach for Developing Valid Human Performance Models of Flight Deck Operations
Validation is critically important when human performance models are used to predict the effect of future system designs on human performance. A model of flight deck operations was...
Brian F. Gore, Becky L. Hooey, Nancy Haan, Deborah...
ISCA
2008
IEEE
188views Hardware» more  ISCA 2008»
15 years 11 months ago
MIRA: A Multi-layered On-Chip Interconnect Router Architecture
Recently, Network-on-Chip (NoC) architectures have gained popularity to address the interconnect delay problem for designing CMP / multi-core / SoC systems in deep sub-micron tech...
Dongkook Park, Soumya Eachempati, Reetuparna Das, ...