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TCAD
2010
106views more  TCAD 2010»
14 years 11 months ago
Modeling the Overshooting Effect for CMOS Inverter Delay Analysis in Nanometer Technologies
—With the scaling of complementary metal–oxide– semiconductor (CMOS) technology into the nanometer regime, the overshooting effect due to the input-to-output coupling capacit...
Zhangcai Huang, Atsushi Kurokawa, Masanori Hashimo...
ISVLSI
2008
IEEE
161views VLSI» more  ISVLSI 2008»
15 years 7 months ago
Impact of Technology Scaling on Digital Subthreshold Circuits
Subthreshold circuits exhibit ultra-low energy per operation at the expense of increased delay. In this contribution, the impact of technology scaling on digital subthreshold circ...
David Bol, Renaud Ambroise, Denis Flandre, Jean-Di...
CIT
2006
Springer
15 years 5 months ago
An Event Notification Service based on XML Messaging on Different Transport Technologies
With the size and increasing complexity of telecom networks, there is a need to interconnect management systems at different levels. This requires information flow across many app...
Ravinder Thirumala, N. Usha Rani, Timothy A. Gonsa...
ASPDAC
2005
ACM
81views Hardware» more  ASPDAC 2005»
15 years 3 months ago
Standard CMOS technology on-chip inductors with pn junctions substrate isolation
New substrate isolation structures using pattern stacked pn junctions for on-chip inductors in standard CMOS technology are presented. For the first time, through increasing the re...
Hongyan Jian, Zhangwen Tang, Jie He, Jinglan He, M...
MT
1998
76views more  MT 1998»
15 years 1 months ago
Line 'Em Up: Advances in Alignment Technology and their Impact on Translation Support Tools
We present a quantitative evaluation of one well-known word alignment algorithm, as well as an analysis of frequent errors in terms of this model's underlying assumptions. De...
Elliott Macklovitch, Marie-Louise Hannan