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» Using Transformations and Verification in Circuit Design
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DATE
2009
IEEE
115views Hardware» more  DATE 2009»
15 years 4 months ago
Customizing IP cores for system-on-chip designs using extensive external don't-cares
Traditional digital circuit synthesis flows start from an HDL behavioral definition and assume that circuit functions are almost completely defined, making don't-care conditio...
Kai-Hui Chang, Valeria Bertacco, Igor L. Markov
102
Voted
ENTCS
2008
106views more  ENTCS 2008»
15 years 13 days ago
Towards Verifying Model Transformations
In model-based software development, a complete design and analysis process involves designing the system using the design language, converting it into the analysis language, and ...
Anantha Narayanan, Gabor Karsai
COMPSAC
2003
IEEE
15 years 5 months ago
A Graph Grammar Approach to Software Architecture Verification and Transformation
Software architecture and design are usually modeled and represented by informal diagrams, such as architecture diagrams and UML diagrams. While these graphic notations are easy t...
Jun Kong, Kang Zhang, Jing Dong, Guang-Lei Song
DAC
1997
ACM
15 years 4 months ago
A C-Based RTL Design Verification Methodology for Complex Microprocessor
Cr, As the complexity of high-performance microprocessor increases, functional verification becomes more and more difficult and RTL simulation emerges as the bottleneck of the des...
Joon-Seo Yim, Yoon-Ho Hwang, Chang-Jae Park, Hoon ...
98
Voted
ATVA
2009
Springer
141views Hardware» more  ATVA 2009»
15 years 4 months ago
Formal Verification for High-Assurance Behavioral Synthesis
We present a framework for certifying hardware designs generated through behavioral synthesis, by using formal verification to certify the associated synthesis transformations. We ...
Sandip Ray, Kecheng Hao, Yan Chen, Fei Xie, Jin Ya...