259 search results - page 23 / 52 » Using Transformations and Verification in Circuit Design |
116
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ICCAD
2002
IEEE
15 years 9 months ago
2002
IEEE
In this survey, we outline basic SAT- and ATPGprocedures as well as their applications in formal hardware verification. We attempt to give the reader a trace trough literature and...
98
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DAC
2007
ACM
16 years 1 months ago
2007
ACM
Modern combinational equivalence checking (CEC) engines are complicated programs which are difficult to verify. In this paper we show how a modern CEC engine can be modified to pr...
103
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DATE
2002
IEEE
15 years 5 months ago
2002
IEEE
Due to the increasing operating frequencies and the manner in which the corresponding integrated circuits and systems must be designed, the extraction, modeling and simulation of ...
DAC
2005
ACM
15 years 2 months ago
2005
ACM
Spatially distributed 3D circuit models are extracted with a segmentto-segment BEM (Boundary Element Method) algorithm for both capacitance and inverse inductance couplings rather...
127
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SIGSOFT
2003
ACM
16 years 1 months ago
2003
ACM
Automated finite-state verification techniques have matured considerably in the past several years, but state-space explosion remains an obstacle to their use. Theoretical lower b...