Sciweavers

259 search results - page 33 / 52
» Using Transformations and Verification in Circuit Design
Sort
View
FPGA
2001
ACM
152views FPGA» more  FPGA 2001»
15 years 5 months ago
A pipelined architecture for partitioned DWT based lossy image compression using FPGA's
Discrete wavelet transformations (DWT) followed by embedded zerotree encoding is a very efficient technique for image compression [2, 5, 4]. However, the algorithms proposed in l...
Jörg Ritter, Paul Molitor
95
Voted
DAC
2005
ACM
15 years 2 months ago
A design platform for 90-nm leakage reduction techniques
Methodology, EDA Flow, scripts, and documentation plays a tremendous role in the deployment and standardization of advanced design techniques. In this paper we focus not only on l...
Philippe Royannez, Hugh Mair, Franck Dahan, Mike W...
DDECS
2007
IEEE
201views Hardware» more  DDECS 2007»
15 years 6 months ago
Built in Defect Prognosis for Embedded Memories
: As scan compression replaces the traditional scan it is important to understand how it works with power. DFT MAX represents one of the two primary scan compression solutions used...
Prashant Dubey, Akhil Garg, Sravan Kumar Bhaskaran...
107
Voted
DAC
2006
ACM
16 years 1 months ago
Statistical timing analysis with correlated non-gaussian parameters using independent component analysis
We propose a scalable and efficient parameterized block-based statistical static timing analysis algorithm incorporating both Gaussian and non-Gaussian parameter distributions, ca...
Jaskirat Singh, Sachin S. Sapatnekar
SAC
2010
ACM
15 years 20 days ago
Graph-based verification of static program constraints
Software artifacts usually have static program constraints and these constraints should be satisfied in each reuse. In addition to this, the developers are also required to satisf...
Selim Ciraci, Pim van den Broek, Mehmet Aksit