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» Using Transformations and Verification in Circuit Design
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123
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DAC
2003
ACM
16 years 1 months ago
Behavioral consistency of C and verilog programs using bounded model checking
We present an algorithm that checks behavioral consistency between an ANSI-C program and a circuit given in Verilog using Bounded Model Checking. Both the circuit and the program ...
Edmund M. Clarke, Daniel Kroening, Karen Yorav
118
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FPGA
2004
ACM
126views FPGA» more  FPGA 2004»
15 years 5 months ago
A synthesis oriented omniscient manual editor
The cost functions used to evaluate logic synthesis transformations for FPGAs are far removed from the final speed and routability determined after placement, routing and timing a...
Tomasz S. Czajkowski, Jonathan Rose
110
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DAC
2010
ACM
15 years 3 months ago
Post-silicon validation opportunities, challenges and recent advances
Post-silicon validation is used to detect and fix bugs in integrated circuits and systems after manufacture. Due to sheer design complexity, it is nearly impossible to detect and ...
Subhasish Mitra, Sanjit A. Seshia, Nicola Nicolici
120
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ICFEM
2010
Springer
14 years 11 months ago
Model-Driven Protocol Design Based on Component Oriented Modeling
Abstract. Due to new emerging areas in the communication field there is a constant need for the design of novel communication protocols. This demands techniques for a rapid and eff...
Prabhu Shankar Kaliappan, Hartmut König, Seba...
FMAM
2010
157views Formal Methods» more  FMAM 2010»
14 years 10 months ago
An Experience on Formal Analysis of a High-Level Graphical SOA Design
: In this paper, we present the experience gained with the participation in a case study in which a novel high-level design language (UML4SOA) was used to produce a service-oriente...
Maurice H. ter Beek, Franco Mazzanti, Aldi Sulova