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» Using Transformations and Verification in Circuit Design
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ICST
2009
IEEE
14 years 10 months ago
Putting Formal Specifications under the Magnifying Glass: Model-based Testing for Validation
A software development process is conceptually an abstract form of model transformation, starting from an enduser model of requirements, through to a system model for which code c...
Emine G. Aydal, Richard F. Paige, Mark Utting, Jim...
DAC
2005
ACM
16 years 1 months ago
Exploiting suspected redundancy without proving it
We present several improvements to general-purpose sequential redundancy removal. First, we propose using a robust variety of synergistic transformation and verification algorithm...
Hari Mony, Jason Baumgartner, Viresh Paruthi, Robe...
APLAS
2008
ACM
15 years 2 months ago
Certified Reasoning in Memory Hierarchies
Abstract. Parallel programming is rapidly gaining importance as a vector to develop high performance applications that exploit the improved capabilities of modern computer architec...
Gilles Barthe, César Kunz, Jorge Luis Sacch...
92
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ICFP
2008
ACM
16 years 13 days ago
Functional netlists
In efforts to overcome the complexity of the syntax and the lack of formal semantics of conventional hardware description languages, a number of functional hardware description la...
Sungwoo Park, Jinha Kim, Hyeonseung Im
109
Voted
ENTCS
2008
106views more  ENTCS 2008»
15 years 16 days ago
Modelling Adaptive Systems in ForSyDe
Emerging architectures such as partially reconfigurable FPGAs provide a huge potential for adaptivity in the area of embedded systems. Since many system functions are only execute...
Ingo Sander, Axel Jantsch