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» Using Transformations and Verification in Circuit Design
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DAC
2002
ACM
16 years 1 months ago
Dynamic hardware plugins in an FPGA with partial run-time reconfiguration
Tools and a design methodology have been developed to support partial run-time reconfiguration of FPGA logic on the Field Programmable Port Extender. High-speed Internet packet pr...
Edson L. Horta, John W. Lockwood, David E. Taylor,...
CASES
2006
ACM
15 years 6 months ago
Modeling heterogeneous SoCs with SystemC: a digital/MEMS case study
Designers of SoCs with non-digital components, such as analog or MEMS devices, can currently use high-level system design languages, such as SystemC, to model only the digital par...
Ankush Varma, Muhammad Yaqub Afridi, Akin Akturk, ...
CCS
2010
ACM
15 years 21 days ago
TASTY: tool for automating secure two-party computations
Secure two-party computation allows two untrusting parties to jointly compute an arbitrary function on their respective private inputs while revealing no information beyond the ou...
Wilko Henecka, Stefan Kögl, Ahmad-Reza Sadegh...
DAC
2001
ACM
16 years 1 months ago
Circuit-based Boolean Reasoning
Many tasks in CAD, such as equivalence checking, property checking, logic synthesis, and false paths analysis require efficient Boolean reasoning for problems derived from circuit...
Andreas Kuehlmann, Malay K. Ganai, Viresh Paruthi
110
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ICMCS
2009
IEEE
136views Multimedia» more  ICMCS 2009»
14 years 10 months ago
Single-iteration full-search fractional motion estimation for quad full HD H.264/AVC encoding
Fractional motion estimation (FME) is widely used in video compression standards. In H.264/AVC, the precision of motion vector is down to quarter pixels to improve the coding effi...
Pei-Kuei Tsung, Wei-Yin Chen, Li-Fu Ding, Chuan-Yu...