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» Using a neural network in the software testing process
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VLSI
2007
Springer
15 years 9 months ago
Impact of hardware emulation on the verification quality improvement
— Software simulation remains the most used method for VHDL RTL functional verification. The functional verification process essentially consists of two parts. The first one is t...
Youssef Serrestou, Vincent Beroulle, Chantal Robac...
NETWORK
2007
100views more  NETWORK 2007»
15 years 3 months ago
Parallel Programmable Ethernet Controllers: Performance and Security
Programmable network interfaces can provide network servers with a flexible interface to high-bandwidth Ethernet links, but they face critical software and architectural challenge...
Derek L. Schuff, Vijay S. Pai, Paul Willmann, Scot...
SIGSOFT
2009
ACM
16 years 4 months ago
Fair and balanced?: bias in bug-fix datasets
Software engineering researchers have long been interested in where and why bugs occur in code, and in predicting where they might turn up next. Historical bug-occurence data has ...
Christian Bird, Adrian Bachmann, Eirik Aune, John ...
ICDAR
2009
IEEE
15 years 10 months ago
Metadata Extraction from PDF Papers for Digital Library Ingest
In this paper we analyze our recent research on the use of document analysis techniques for metadata extraction from PDF papers. We describe a package that is designed to extract ...
Simone Marinai
ISSE
2010
15 years 2 months ago
A second look at Faster, Better, Cheaper
“Faster, Better, Cheaper” (FBC) was a systems development methodology used by NASA in the 1990s. While usually a deprecated practice, we find that, with certain caveats, it is...
Oussama El-Rawas, Tim Menzies