176 search results - page 16 / 36 » Using configurable processors for high-efficiency multiple-p... |
CODES
2001
IEEE
15 years 1 months ago
2001
IEEE
Network hardware design is becoming increasingly challenging because more and more demands are put on network bandwidth and throughput requirements, and on the speed with which ne...
VLSID
2002
IEEE
15 years 10 months ago
2002
IEEE
Among the many techniques for system-level power management, it is not currently possible to guarantee timing constraints and have a comprehensive system model at the same time. S...
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TCAD
2008
14 years 9 months ago
2008
Functional correctness is a vital attribute of any hardware design. Unfortunately, due to extremely complex architectures, widespread components, such as microprocessors, are often...
ICCD
2006
IEEE
15 years 6 months ago
2006
IEEE
By integrating one or more (hard or soft) CPU core on the chip, new generation platform FPGAs have become configurable systems on a chip (CSoC) that support a combined software an...
CCGRID
2009
IEEE
15 years 4 months ago
2009
IEEE
In a cluster of multiple processors or cpu-cores, many processes may run on each compute node. Each process tends to issue contiguous I/O requests for snapshot, checkpointing or s...