176 search results - page 20 / 36 » Using configurable processors for high-efficiency multiple-p... |
105
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HPCA
2009
IEEE
15 years 10 months ago
2009
IEEE
The shrinking processor feature size, lower threshold voltage and increasing clock frequency make modern processors highly vulnerable to transient faults. Architectural Vulnerabil...
77
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MICRO
1998
IEEE
15 years 1 months ago
1998
IEEE
This paper provides quantitative measurements of load latency tolerance in a dynamically scheduled processor. To determine the latency tolerance of each memory load operation, our...
100
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SC
2005
ACM
15 years 3 months ago
2005
ACM
The development of complex scientific applications for high-end systems is a challenging task. Addressing complexity of the involved software and algorithms is becoming increasing...
100
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FCCM
2004
IEEE
15 years 1 months ago
2004
IEEE
Dynamically Reconfigurable Processor (DRP)[1] developed by NEC Electronics is a coarse grain reconfigurable processor that selects a data path from the on-chip repository of sixte...
NIPS
2003
14 years 11 months ago
2003
At a cocktail party, a listener can selectively attend to a single voice and filter out other acoustical interferences. How to simulate this perceptual ability remains a great cha...