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ICS
2009
Tsinghua U.
15 years 2 months ago
A comprehensive power-performance model for NoCs with multi-flit channel buffers
Large Multi-Processor Systems-on-Chip use Networks-on-Chip with a high degree of reusability and scalability for message communication. Therefore, network infrastructure is a cruc...
Mohammad Arjomand, Hamid Sarbazi-Azad
EMSOFT
2008
Springer
14 years 11 months ago
Tax-and-spend: democratic scheduling for real-time garbage collection
Real-time Garbage Collection (RTGC) has recently advanced to the point where it is being used in production for financial trading, military command-and-control, and telecommunicat...
Joshua S. Auerbach, David F. Bacon, Perry Cheng, D...
JSA
2000
116views more  JSA 2000»
14 years 9 months ago
Distributed vector architectures
Integrating processors and main memory is a promising approach to increase system performance. Such integration provides very high memory bandwidth that can be exploited efficientl...
Stefanos Kaxiras
ADBIS
1995
Springer
155views Database» more  ADBIS 1995»
15 years 1 months ago
The MaStA I/O Cost Model and its Validation Strategy
Crash recovery in database systems aims to provide an acceptable level of protection from failure at a given engineering cost. A large number of recovery mechanisms are known, and...
S. Scheuerl, Richard C. H. Connor, Ronald Morrison...
DAC
2004
ACM
15 years 10 months ago
Heterogeneous MP-SoC: the solution to energy-efficient signal processing
To meet conflicting flexibility, performance and cost constraints of demanding signal processing applications, future designs in this domain will contain an increasing number of a...
Tim Kogel, Heinrich Meyr