Sciweavers

173 search results - page 10 / 35
» Using hardware transactional memory for data race detection
Sort
View
SPAA
2009
ACM
16 years 6 days ago
NZTM: nonblocking zero-indirection transactional memory
This workshop paper reports work in progress on NZTM, a nonblocking, zero-indirection object-based hybrid transactional memory system. NZTM can execute transactions using best-eff...
Fuad Tabba, Mark Moir, James R. Goodman, Andrew W....
SPAA
2009
ACM
16 years 6 days ago
Towards transactional memory semantics for C++
Transactional memory (TM) eliminates many problems associated with lock-based synchronization. Over recent years, much progress has been made in software and hardware implementati...
Tatiana Shpeisman, Ali-Reza Adl-Tabatabai, Robert ...
ASPLOS
2012
ACM
13 years 7 months ago
Aikido: accelerating shared data dynamic analyses
Despite a burgeoning demand for parallel programs, the tools available to developers working on shared-memory multicore processors have lagged behind. One reason for this is the l...
Marek Olszewski, Qin Zhao, David Koh, Jason Ansel,...
MICRO
2008
IEEE
109views Hardware» more  MICRO 2008»
15 years 6 months ago
Dependence-aware transactional memory for increased concurrency
—Transactional memory (TM) is a promising paradigm for helping programmers take advantage of emerging multicore platforms. Though they perform well under low contention, hardware...
Hany E. Ramadan, Christopher J. Rossbach, Emmett W...
DATE
2007
IEEE
174views Hardware» more  DATE 2007»
15 years 6 months ago
ATLAS: a chip-multiprocessor with transactional memory support
Chip-multiprocessors are quickly becoming popular in embedded systems. However, the practical success of CMPs strongly depends on addressing the difficulty of multithreaded appli...
Njuguna Njoroge, Jared Casper, Sewook Wee, Yuriy T...