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HPCA
2003
IEEE
16 years 6 months ago
Reconsidering Complex Branch Predictors
To sustain instruction throughput rates in more aggressively clocked microarchitectures, microarchitects have incorporated larger and more complex branch predictors into their des...
Daniel A. Jiménez
ISPDC
2010
IEEE
15 years 4 months ago
Resource-Aware Compiler Prefetching for Many-Cores
—Super-scalar, out-of-order processors that can have tens of read and write requests in the execution window place significant demands on Memory Level Parallelism (MLP). Multi- ...
George C. Caragea, Alexandros Tzannes, Fuat Keceli...
146
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IPPS
2008
IEEE
16 years 20 days ago
A Hybrid MPI design using SCTP and iWARP
Abstract— Remote Direct Memory Access (RDMA) and pointto-point network fabrics both have their own advantages. MPI middleware implementations typically use one or the other, howe...
Mike Tsai, Brad Penoff, Alan Wagner
ICS
2010
Tsinghua U.
15 years 4 months ago
Decomposable and responsive power models for multicore processors using performance counters
Abstract—Power modeling based on performance monitoring counters (PMCs) has attracted the interest of many researchers since it become a quick approach to understand and analyse ...
Ramon Bertran, Marc González, Xavier Martor...
DCOSS
2010
Springer
15 years 11 months ago
Tables: A Spreadsheet-Inspired Programming Model for Sensor Networks
Abstract. Current programming interfaces for sensor networks often target experienced developers and lack important features. Tables is a spreadsheet inspired programming environme...
James Horey, Eric Nelson, Arthur B. Maccabe