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CASES
2007
ACM
15 years 5 months ago
Lightweight barrier-based parallelization support for non-cache-coherent MPSoC platforms
Many MPSoC applications are loop-intensive and amenable to automatic parallelization with suitable compiler support. One of the key components of any compiler-parallelized code is...
Andrea Marongiu, Luca Benini, Mahmut T. Kandemir
DAC
2007
ACM
15 years 5 months ago
Design for Verification in System-level Models and RTL
It has long been the practice to create models in C or C++ for architectural studies, software prototyping and RTL verification in the design of Systems-on-Chip (SoC). It is often...
Anmol Mathur, Venkat Krishnaswamy
TON
2012
13 years 4 months ago
Latency Equalization as a New Network Service Primitive
—Multiparty interactive network applications such as teleconferencing, network gaming, and online trading are gaining popularity. In addition to end-to-end latency bounds, these ...
Minlan Yu, Marina Thottan, Li (Erran) Li
VLSID
2005
IEEE
129views VLSI» more  VLSID 2005»
16 years 2 months ago
A RISC Hardware Platform for Low Power Java
Java is increasingly being used as a language and binary format for low power, embedded systems. Current software only approaches to Java execution do not always suit the type of ...
Paul Capewell, Ian Watson
DAC
1999
ACM
15 years 6 months ago
Verification and Management of a Multimillion-Gate Embedded Core Design
Verification is one of the most critical and time-consuming tasks in today's design processes. This paper demonstrates the verification process of a 8.8 million gate design u...
Johann Notbauer, Thomas W. Albrecht, Georg Niedris...