822 search results - page 48 / 165 » Using simulated annealing for producing software architectur... |
VLSID
2002
IEEE
16 years 2 months ago
2002
IEEE
One of the major roadblocks in reduction of library generation cycle time is the layout generation phase. The two methods of doing automatic layout generation are synthesis and mig...
113
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ISCA
2010
IEEE
15 years 6 months ago
2010
IEEE
Given the multicore microprocessor revolution, we argue that the architecture research community needs a dramatic increase in simulation capacity. We believe FPGA Architecture Mod...
129
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MICRO
2003
IEEE
15 years 7 months ago
2003
IEEE
Due to the widespread software piracy and virus attacks, significant efforts have been made to improve security for computer systems. For stand-alone computers, a key observation...
105
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APSEC
2000
IEEE
15 years 6 months ago
2000
IEEE
Explosive increase in end-user computing on distributed systems requires that end-users develop application software by themselves. One solution is given as a formula of “a doma...
145
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DAC
2004
ACM
15 years 5 months ago
2004
ACM
This paper presents new technology that accelerates system verification. Traditional methods for verifying functional designs are based on logic simulation, which becomes more tim...