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» Using the Compiler to Improve Cache Replacement Decisions
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LCPC
1997
Springer
15 years 1 months ago
Reducing Synchronization Overhead for Compiler-Parallelized Codes
Software distributed-shared-memory (DSM) systems providean appealingtarget for parallelizing compilers due to their flexibility. Previous studies demonstrate such systems can prov...
Hwansoo Han, Chau-Wen Tseng, Peter J. Keleher
ECOOP
1995
Springer
15 years 1 months ago
Optimization of Object-Oriented Programs Using Static Class Hierarchy Analysis
Optimizing compilers for object-oriented languages apply static class analysis and other techniques to try to deduce precise information about the possible classes of the receivers...
Jeffrey Dean, David Grove, Craig Chambers
FAST
2003
14 years 10 months ago
Using MEMS-Based Storage in Disk Arrays
Current disk arrays, the basic building blocks of highperformance storage systems, are built around two memory technologies: magnetic disk drives, and non-volatile DRAM caches. Di...
Mustafa Uysal, Arif Merchant, Guillermo A. Alvarez
ICS
2005
Tsinghua U.
15 years 3 months ago
A heterogeneously segmented cache architecture for a packet forwarding engine
As network traffic continues to increase and with the requirement to process packets at line rates, high performance routers need to forward millions of packets every second. Eve...
Kaushik Rajan, Ramaswamy Govindarajan
HPCA
2001
IEEE
15 years 9 months ago
Reducing DRAM Latencies with an Integrated Memory Hierarchy Design
In this papel; we address the severe performance gap caused by high processor clock rates and slow DRAM accesses. We show that even with an aggressive, next-generation memory syst...
Wei-Fen Lin, Steven K. Reinhardt, Doug Burger