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» Using the Temporal Logic RDL for Design Specifications
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SIGSOFT
2007
ACM
16 years 11 days ago
The symmetry of the past and of the future: bi-infinite time in the verification of temporal properties
Model checking techniques have traditionally dealt with temporal logic languages and automata interpreted over -words, i.e., infinite in the future but finite in the past. However...
Matteo Pradella, Angelo Morzenti, Pierluigi San Pi...
84
Voted
SIGSOFT
2005
ACM
16 years 11 days ago
Fluent temporal logic for discrete-time event-based models
Fluent model checking is an automated technique for verifying that an event-based operational model satisfies some state-based declarative properties. The link between the event-b...
Emmanuel Letier, Jeff Kramer, Jeff Magee, Sebasti&...
RCC
2002
104views more  RCC 2002»
14 years 11 months ago
Architectural Specification, Exploration and Simulation Through Rewriting-Logic
In recent years Arvind's Group at MIT has shown the usefulness of term rewriting theory for the specification of processor architectures. In their approach processors specifi...
Mauricio Ayala-Rincón, Reiner W. Hartenstei...
ECAI
2008
Springer
15 years 1 months ago
XTT+ Rule Design Using the ALSV(FD)
This paper presents advances in Set Attributive Logic and its application to develop tabular rule-based systems within the XTT framework. The primary goal is to extend the expressi...
Grzegorz J. Nalepa, Antoni Ligeza
113
Voted
EMSOFT
2008
Springer
15 years 1 months ago
RTComposer: a framework for real-time components with scheduling interfaces
We present a framework for component-based design and scheduling of real-time embedded software. Each component has a clearly specified interface that includes the methods used fo...
Rajeev Alur, Gera Weiss