496 search results - page 40 / 100 » Using the Temporal Logic RDL for Design Specifications |
AAAI
1996
14 years 11 months ago
1996
The representation of narratives of actions and observations is a current issue in Knowledge Representation, where traditional plan-oriented treatments of action seem to fall shor...
DAC
2007
ACM
15 years 10 months ago
2007
ACM
This paper presents a variation resilient circuit design technique for maintaining parametric yield of design under inherent variation in process parameters. We propose to utilize...
CADE
2002
Springer
15 years 10 months ago
2002
Springer
Abstract. We investigate the combination of propositional SAT checkers with domain-specific theorem provers as a foundation for bounded model checking over infinite domains. Given ...
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SPIN
2010
Springer
14 years 8 months ago
2010
Springer
In the field of communication networks, protocol engineers usually employ several tools focused on specific kinds of analysis, such as performance or correctness. This paper pres...
DATE
2009
IEEE
15 years 4 months ago
2009
IEEE
Negative Bias Temperature Instability (NBTI), a PMOS aging phenomenon causing significant loss on circuit performance and lifetime, has become a critical challenge for temporal re...