496 search results - page 57 / 100 » Using the Temporal Logic RDL for Design Specifications |
ICCAD
1999
IEEE
15 years 2 months ago
1999
IEEE
In Deep Sub-Micron (DSM) designs, performance will depend critically on the latency of long wires. We propose a new synthesis methodology for synchronous systems that makes the de...
CODES
2007
IEEE
15 years 1 months ago
2007
IEEE
The synchronous computational model with its simple computation and communication mechanism makes it easy to describe, simulate and formally verify synchronous embedded systems at...
IUI
2003
ACM
15 years 3 months ago
2003
ACM
An emerging approach to multi-device application development developers to build an abstract semantic model that is translated into specific implementations for web browsers, PDAs...
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SIGCSE
2000
ACM
15 years 2 months ago
2000
ACM
Classifying is a central activity in object-oriented programming and distinguishes it from procedural programming. Traditional logic, initiated by Aristotle, assigns classificatio...
SEW
2006
IEEE
2006
IEEE
Model Checking of Software Components: Combining Java PathFinder and Behavior Protocol Model Checker
15 years 3 months ago
Although there exist several software model checkers that check the code against properties specified e.g. via a temporal logic and assertions, or just verifying low-level propert...