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» Using the Temporal Logic RDL for Design Specifications
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PADL
2009
Springer
15 years 10 months ago
Declarative Network Verification
Abstract. In this paper, we present our initial design and implementation of a declarative network verifier (DNV). DNV utilizes theorem proving, a well established verification tec...
Anduo Wang, Prithwish Basu, Boon Thau Loo, Oleg So...
LCTRTS
1998
Springer
15 years 2 months ago
A Tool to Assist in Fine-Tuning and Debugging Embedded Real-Time Systems
: During the latter stages of a software product cycle, developers may be faced with the task of fine-tuning an embedded system that is not meeting all of its timing requirements. ...
Gaurav Arora, David B. Stewart
72
Voted
ICPR
2010
IEEE
15 years 1 months ago
Baby-Posture Classification from Pressure-Sensor Data
The activity of babies and more specifically the posture of babies is an important aspect in their safety and development. In this paper, we studied the automatic classification o...
Sabri Boughorbel, Fons Bruekers, Jeroen Breebaart
CHI
2007
ACM
15 years 10 months ago
Computer aided observations of complex mobile situations
Designing mobile and wearable applications is a challenge. The context of use is more important than ever and traditional methodologies for elicitation and specification reach the...
Tobias Klug
NJC
2006
86views more  NJC 2006»
14 years 9 months ago
Structured Formal Development in Isabelle
Abstract. General purpose theorem provers provide advanced facilities for proving properties about specifications, and may therefore be a valuable tool in formal program developmen...
Maksym Bortin, Einar Broch Johnsen, Christoph L&uu...