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» Using the Temporal Logic RDL for Design Specifications
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ENTCS
2002
97views more  ENTCS 2002»
14 years 9 months ago
Plan in Maude: Specifying an Active Network Programming Language
PLAN is a language designed for programming active networks, and can more generally be regarded as a model of mobile computation. PLAN generalizes the paradigm of imperative funct...
Mark-Oliver Stehr, Carolyn L. Talcott
IJCAI
2003
14 years 11 months ago
Formal Verification of Diagnosability via Symbolic Model Checking
This paper addresses the formal verification of diagnosis systems. We tackle the problem of diagnosability: given a partially observable dynamic system, and a diagnosis system obs...
Alessandro Cimatti, Charles Pecheur, Roberto Cavad...
DAC
2002
ACM
15 years 10 months ago
Hole analysis for functional coverage data
One of the main goals of coverage tools is to provide the user with informative presentation of coverage information. Specifically, information on large, cohesive sets of uncovere...
Oded Lachish, Eitan Marcus, Shmuel Ur, Avi Ziv
FAC
2000
114views more  FAC 2000»
14 years 9 months ago
Representational Reasoning and Verification
Formal approaches to the design of interactive systems rely on reasoning about properties of the t a very high level of abstraction. Specifications to support such an approach typi...
Gavin J. Doherty, José Creissac Campos, Mic...
ASE
2005
137views more  ASE 2005»
14 years 9 months ago
Rewriting-Based Techniques for Runtime Verification
Techniques for efficiently evaluating future time Linear Temporal Logic (abbreviated LTL) formulae on finite execution traces are presented. While the standard models of LTL are i...
Grigore Rosu, Klaus Havelund