496 search results - page 93 / 100 » Using the Temporal Logic RDL for Design Specifications |
78
Voted
DAC
2009
ACM
15 years 10 months ago
2009
ACM
Traditionally, synchronous languages, such as Esterel, have been compiled into hardware, where timing analysis is relatively easy. When compiled into software ? e.g., into sequent...
86
Voted
CHI
2003
ACM
15 years 2 months ago
2003
ACM
BreakingStory is an interactive system for visualizing change in online news. The system regularly collects the text from the front pages of international daily news web sites. It...
KDD
2007
ACM
15 years 10 months ago
2007
ACM
In this study, a novel multidimensional time series classification technique, namely support feature machine (SFM), is proposed. SFM is inspired by the optimization model of suppo...
VRCAI
2004
ACM
15 years 3 months ago
2004
ACM
Despite steady research advances in many aspects of virtual reality, building and testing virtual worlds remains to be a very difficult process. Most virtual environments are stil...
MEMOCODE
2003
IEEE
15 years 2 months ago
2003
IEEE
In the design process of SoC (System on Chip), validation is one of the most critical and costly activity. The main problem for industrial companies like STMicroelectronics, stand...