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HPCA
2009
IEEE
16 years 11 days ago
Dacota: Post-silicon validation of the memory subsystem in multi-core designs
The number of functional errors escaping design verification and being released into final silicon is growing, due to the increasing complexity and shrinking production schedules ...
Andrew DeOrio, Ilya Wagner, Valeria Bertacco
HPCA
2008
IEEE
16 years 5 days ago
DeCoR: A Delayed Commit and Rollback mechanism for handling inductive noise in processors
Increases in peak current draw and reductions in the operating voltages of processors continue to amplify the importance of dealing with voltage fluctuations in processors. Noise-...
Meeta Sharma Gupta, Krishna K. Rangan, Michael D. ...
WISEC
2009
ACM
15 years 6 months ago
Link-layer protection in 802.11i WLANS with dummy authentication
The current 802.11i standard can provide data confidentiality, integrity and mutual authentication in enterprise Wireless Local Area Networks (WLANs). However, secure communicati...
Zhimin Yang, Adam C. Champion, Boxuan Gu, Xiaole B...
BMCBI
2006
113views more  BMCBI 2006»
14 years 12 months ago
GibbsST: a Gibbs sampling method for motif discovery with enhanced resistance to local optima
Background: Computational discovery of transcription factor binding sites (TFBS) is a challenging but important problem of bioinformatics. In this study, improvement of a Gibbs sa...
Kazuhito Shida
HPCC
2007
Springer
15 years 6 months ago
Optimizing Array Accesses in High Productivity Languages
One of the outcomes of DARPA’s HPCS program has been the creation of three new high productivity languages: Chapel, Fortress, and X10. While these languages have introduced impro...
Mackale Joyner, Zoran Budimlic, Vivek Sarkar