352 search results - page 11 / 71 » VHDL |
EURODAC
1995
IEEE
15 years 1 months ago
1995
IEEE
This paper describes the features and design methodology of MIDA, a MPEG1 integrated audio decoder. MIDA has been almost completely designed using automatic synthesis of VHDL desc...
EURODAC
1995
IEEE
15 years 1 months ago
1995
IEEE
Verification of image processing systems is mainly done on the basis of image sequence simulations. To achieve high simulation efficiency, our compiled code simulator MSIPC offers...
EURODAC
1995
IEEE
15 years 1 months ago
1995
IEEE
A hierarchical system design flow was developed to facilitate concurrent development and Time-to-Market reductions. The system design flow provides for codesign of (embedded) driv...
HVC
2007
Springer
15 years 3 months ago
2007
Springer
The paper presents a new approach to formal verification of generic (i.e. parametrised) hardware designs specified in VHDL. The proposed approach is based on a translation of suc...
EURODAC
1994
IEEE
15 years 1 months ago
1994
IEEE
Modern CAD systems allow the designers to come up with powerful programmable datapaths in avery short time. The time to develop compilers for this datapaths is much longer. This p...