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CODES
2001
IEEE
15 years 1 months ago
Development cost and size estimation starting from high-level specifications
This paper addresses the problem of estimating cost and development effort of a system, starting from its complete or partial high-level description. In addition, some modificatio...
William Fornaciari, Fabio Salice, Umberto Bondi, E...
ISVLSI
2007
IEEE
230views VLSI» more  ISVLSI 2007»
15 years 3 months ago
A Methodology and Toolset to Enable SystemC and VHDL Co-simulation
The new design challenges imposed by the increasing difficulties of today’s electronic systems obligated designers to develop new methodologies. System-level design and Platfor...
Richard Maciel, Bruno Albertini, Sandro Rigo, Guid...
EUROMICRO
2000
IEEE
15 years 2 months ago
Concurrent Control Systems: From Grafcet to VHDL
The Automated Production Systems (APS) are composed of concurrent interacting entities. Then any model should exhibit parallel and sequential behaviours. The Grafcet is now well e...
Frédéric Mallet, Daniel Gaffé...
BMAS
2000
IEEE
15 years 2 months ago
VHDL Based Simulation of a Sigma-Delta A/D Converter
The VHDL based mixed-signal event-driven (MixED) simulation method is employed to simulate a sigma-delta modulator for A/D conversion. Results are verified by experimental data an...
Martin Schubert
JISE
1998
106views more  JISE 1998»
14 years 9 months ago
Control / Data-Flow Analysis for VHDL Semantic Extraction
straction reduces the number of states necessary to perform formal verification while maintaining the functionality of the original model with respect to ifications to be verified....
Yee-Wing Hsieh, Steven P. Levitan