352 search results - page 23 / 71 » VHDL |
EURODAC
1994
IEEE
15 years 1 months ago
1994
IEEE
The simulation of lossy transmission lines in the time domain is a very time consuming task. It requires numerical convolutions and the solution of linear and nonlinear equation s...
EURODAC
1994
IEEE
1994
IEEE
OSCAR: optimum simultaneous scheduling, allocation and resource binding based on integer programming
15 years 1 months ago
: This paper presents an approach to high-level synthesis which is based upon a 0/1 integer programming model. In contrast to other approaches, this model allows solving all three ...
EURODAC
1994
IEEE
15 years 1 months ago
1994
IEEE
This paper describes a unique approach to scheduling and allocation problem in high-level synthesis using genetic algorithm (GA). This approach is dierent from a previous attempt ...
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EURODAC
1994
IEEE
15 years 1 months ago
1994
IEEE
We outline a general methodology for the formal verification of pipeline conflicts in RISC cores. The different kinds of conflicts that can occur due to the simultaneous execution...
EURODAC
1994
IEEE
15 years 1 months ago
1994
IEEE
An approach for stuck-at-i and delay-fault testing of redundant circuits without modifying the logic is proposed. The only requirement is the ability to control both phases of eac...