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EURODAC
1990
IEEE
102views VHDL» more  EURODAC 1990»
15 years 1 months ago
Tools and devices supporting the pseudo-exhaustive test
: In this paper logical cells and algorithms are presented supporting the design of pseudo-exhaustively testable circuits. The approach is based on real hardware segmentation, inst...
Sybille Hellebrand, Hans-Joachim Wunderlich
EURODAC
1995
IEEE
128views VHDL» more  EURODAC 1995»
15 years 1 months ago
Closeness metrics for system-level functional partitioning
An important system design task is the partitioning of system functionality for implementation among multiple system components, including partitions among hardware and software c...
Frank Vahid, Daniel D. Gajski
EURODAC
1995
IEEE
173views VHDL» more  EURODAC 1995»
15 years 1 months ago
Cooperative concurrency control for design environments
In this paper, we present a new model for concurrency control that supports cooperation of design tools and designers in a design environment. We capture characteristic access and...
Ansgar Bredenfeld
EURODAC
1995
IEEE
116views VHDL» more  EURODAC 1995»
15 years 1 months ago
An improved relaxation approach for mixed system analysis with several simulation tools
: This paper introduces a modified relaxation approach that allows to improve the convergence of iterations while analyzing mixed systems with different simulators. The method redu...
Vladimir B. Dmitriev-Zdorov, Bernhard Klaassen
EURODAC
1995
IEEE
136views VHDL» more  EURODAC 1995»
15 years 1 months ago
Computing subsets of equivalence classes for large FSMs
Computing equivalence classes for FSMs has several applications to synthesis and veri cation problems. Symbolic traversal techniques are applicable to medium-small circuits. This ...
Gianpiero Cabodi, Stefano Quer, Paolo Camurati