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VLSID
2004
IEEE
292views VLSI» more  VLSID 2004»
15 years 10 months ago
NoCGEN: A Template Based Reuse Methodology for Networks on Chip Architecture
In this paper, we describe NoCGEN, a Network On Chip (NoC) generator, which is used to create a simulatable and synthesizable NoC description. NoCGEN uses a set of modularised rou...
Jeremy Chan, Sri Parameswaran
ICCAD
2001
IEEE
91views Hardware» more  ICCAD 2001»
15 years 6 months ago
A System for Synthesizing Optimized FPGA Hardware from MATLAB
Efficient high level design tools that can map behavioral descriptions to FPGA architectures are one of the key requirements to fully leverage FPGA for high throughput computatio...
Malay Haldar, Anshuman Nayak, Alok N. Choudhary, P...
DATE
2009
IEEE
150views Hardware» more  DATE 2009»
15 years 4 months ago
A co-design approach for embedded system modeling and code generation with UML and MARTE
—In this paper we propose a UML/MDA approach, called MoPCoM methodology, to design high quality real-time embedded systems. We have defined a set of rules to build UML models fo...
Jorgiano Vidal, Florent de Lamotte, Guy Gogniat, P...
ICONS
2008
IEEE
15 years 4 months ago
SOPC Co-design Platform for UWB System in Wireless Sensor Network Context
– This paper presents our approach of the radio interface problematic for Wireless Sensor Network. We introduce the WSN context and constraints associated. We propose an IR-UWB s...
Daniela Dragomirescu, Aubin Lecointre, Robert Plan...
FCCM
2005
IEEE
84views VLSI» more  FCCM 2005»
15 years 3 months ago
Prototyping Architectural Support for Program Rollback Using FPGAs
This paper presents a processor and memory-hierarchy prototype based on FPGAs that provides hardware support for program rollback. We use this prototype to demonstrate how compile...
Radu Teodorescu, Josep Torrellas