In this paper, we describe NoCGEN, a Network On Chip (NoC) generator, which is used to create a simulatable and synthesizable NoC description. NoCGEN uses a set of modularised rou...
Efficient high level design tools that can map behavioral descriptions to FPGA architectures are one of the key requirements to fully leverage FPGA for high throughput computatio...
Malay Haldar, Anshuman Nayak, Alok N. Choudhary, P...
—In this paper we propose a UML/MDA approach, called MoPCoM methodology, to design high quality real-time embedded systems. We have defined a set of rules to build UML models fo...
Jorgiano Vidal, Florent de Lamotte, Guy Gogniat, P...
– This paper presents our approach of the radio interface problematic for Wireless Sensor Network. We introduce the WSN context and constraints associated. We propose an IR-UWB s...
Daniela Dragomirescu, Aubin Lecointre, Robert Plan...
This paper presents a processor and memory-hierarchy prototype based on FPGAs that provides hardware support for program rollback. We use this prototype to demonstrate how compile...