352 search results - page 31 / 71 » VHDL |
EURODAC
1994
IEEE
15 years 1 months ago
1994
IEEE
This paper presents an algorithm for generation of test patterns for strong robust path delay faults, i.e. tests that propagate the fault along a single path and additionally are ...
EURODAC
1994
IEEE
15 years 1 months ago
1994
IEEE
In this paper we introduce a new knowledgebased method for planning and managing the VLSI design process, based on prediction and advice, that minimizes search in a wide design sp...
EURODAC
1994
IEEE
15 years 1 months ago
1994
IEEE
Symbolic state space exploration techniques for Finite State Machines (FSMs) are a major recent result in CAD for VLSI. Most of them are exact and based on forward traversal, but ...
EURODAC
1990
IEEE
15 years 1 months ago
1990
IEEE
In this paper an efficient cone oriented circuit partitioning method is presented, which significantly speeds up automatic test pattern generation for combinational circuits. The ...
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ENC
2004
IEEE
15 years 1 months ago
2004
IEEE
We present a hardware architecture for an Elliptic Curve Cryptography System performing the three basic cryptographic schemes: DH key generation, encryption and digital signature....