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EURODAC
1995
IEEE
151views VHDL» more  EURODAC 1995»
15 years 1 months ago
Model of conceptual design of complex electronic systems
Due to the ever increasing complexity of electronic system (ES) design, the conceptual design phase and its realization in later phases of the design stream have become increasing...
Alexander N. Soloviev, Alexander L. Stempkovsky
EURODAC
1995
IEEE
182views VHDL» more  EURODAC 1995»
15 years 1 months ago
Delay modelling improvement for low voltage applications
Based on an explicit formulation of delays, an improved model for low voltage operation of CMOS inverter has been derived. Extrinsic and intrinsic effects, such as transistor curr...
Jean Michel Daga, Michel Robert, Daniel Auvergne
EURODAC
1995
IEEE
133views VHDL» more  EURODAC 1995»
15 years 1 months ago
Tree restructuring approach to mapping problem in cellular-architecture FPGAs
A new technique for mapping combinational circuits to Fine-Grain Cellular-Architecture FPGAs is presented. The proposed tree restructuring algorithm preserves local connectivity a...
Naveen Ramineni, Malgorzata Chrzanowska-Jeske, Nav...

Book
334views
16 years 5 months ago
Application-Specific Integrated Circuits
"An ASIC (pronounced “a-sick”; bold typeface defines a new term) is an application-specific integrated circuit —at least that is what the acronym stands for. Before we a...
Michael John Sebastian Smith
DSD
2007
IEEE
119views Hardware» more  DSD 2007»
15 years 4 months ago
Online Protocol Testing for FPGA Based Fault Tolerant Systems
In this paper, the methodology for automated design of checker for communication protocol testing is presented. Based on the level of checking, different design strategies can be ...
Jiri Tobola, Zdenek Kotásek, Jan Korenek, T...