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SPIN
2000
Springer
15 years 1 months ago
The Temporal Rover and the ATG Rover
The Temporal Rover is a specification based verification tool for applications written in C, C++, Java, Verilog and VHDL. The tool combines formal specification, using Linear-Time ...
Doron Drusinsky
66
Voted
AHS
2007
IEEE
262views Hardware» more  AHS 2007»
14 years 11 months ago
A Reed-Solomon Algorithm for FPGA Area Optimization in Space Applications
This work describes an algebraic based design strategy targeting area optimization in reconfigurable computer technology (FPGA). Area optimization is a major issue as smaller comp...
Gabriel Marchesan Almeida, Eduardo Augusto Bezerra...
83
Voted
FPGA
2008
ACM
146views FPGA» more  FPGA 2008»
14 years 11 months ago
FPGA-optimised high-quality uniform random number generators
This paper introduces a method of constructing random number generators from four of the basic primitives provided by FPGAs: Flip-Flips, Lookup-Tables, Shift Registers, and RAMs. ...
David B. Thomas, Wayne Luk
FPL
2008
Springer
150views Hardware» more  FPL 2008»
14 years 11 months ago
Compiler generated systolic arrays for wavefront algorithm acceleration on FPGAs
Wavefront algorithms, such as the Smith-Waterman algorithm, are commonly used in bioinformatics for exact local and global sequence alignment. These algorithms are highly computat...
Betul Buyukkurt, Walid A. Najjar
77
Voted
CDES
2006
101views Hardware» more  CDES 2006»
14 years 11 months ago
Hybrid Error-Detection Approach with No Detection Latency for High-Performance Microprocessors
- Error detection plays an important role in fault-tolerant computer systems. Two primary parameters concerned for error detection are the latency and coverage. In this paper, a ne...
Yung-Yuan Chen, Kuen-Long Leu, Li-Wen Lin