110 search results - page 4 / 22 » VLSI Circuit Synthesis Using a Parallel Genetic Algorithm |
115
Voted
IPPS
2006
IEEE
15 years 7 months ago
2006
IEEE
Models of simulation program with integrated circuit emphasis (SPICE) are currently playing a central role in the connection between circuit design and chip fabrication communitie...
101
Voted
GECCO
2004
Springer
15 years 6 months ago
2004
Springer
We propose a hybrid genetic algorithm for partitioning a VLSI circuit graph into two disjoint graphs of minimum cut size. The algorithm includes a local optimization heuristic whic...
174
Voted
FPGA
2006
ACM
15 years 4 months ago
2006
ACM
In this paper, we propose a technique to flexibly implement genetic algorithms for various problems on FPGAs. For the purpose, we propose a basic architecture for GA which consist...
122
Voted
ICCAD
2002
IEEE
15 years 10 months ago
2002
IEEE
In this paper we present an advanced functional extraction tool for automatic generation of high-level RTL from switch-level circuit netlist representation. The tool is called FEV...
111
Voted
GLVLSI
2008
IEEE
15 years 7 months ago
2008
IEEE
Timing optimizations during logic synthesis has become a necessary step to achieve timing closure in VLSI designs. This often involves “shortening” all paths found in the circ...