70 search results - page 8 / 14 » VLSI Implementation of a Fault-Tolerant Distributed Clock Ge... |
114
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GLVLSI
2000
IEEE
15 years 5 months ago
2000
IEEE
† The limits on CMOS energy dissipation imposed by subthreshold leakage currents and by wiring capacitance are investigated for CMOS generations beyond 50nm at NTRS projected loc...
ICEC
1994
15 years 2 months ago
1994
A parallel implementation of a genetic algorithm used to evolve simple analog VLSI circuits is described. The parallel computer system consisted of twenty distributed SPARC workst...
128
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BMCBI
2007
15 years 1 months ago
2007
Background: An in-silico experiment can be naturally specified as a workflow of activities implementing, in a standardized environment, the process of data and control analysis. A...
135
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ICASSP
2011
IEEE
14 years 5 months ago
2011
IEEE
In this paper a exible, high-throughput, low-complexity additive white gaussian noise (AWGN) channel generator is presented. The proposed generator employs a Mersenne-Twister to g...
131
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ISLPED
2010
ACM
14 years 11 months ago
2010
ACM
Abstract--As a replacement for the fast-fading GloballySynchronous model, we have defined a flexible design style called GRLS, for Globally-Ratiochronous, Locally-Synchronous, whic...