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HPCA
2003
IEEE
16 years 3 months ago
Exploring the VLSI Scalability of Stream Processors
Stream processors are high-performance programmable processors optimized to run media applications. Recent work has shown these processors to be more area- and energy-efficient th...
Brucek Khailany, William J. Dally, Scott Rixner, U...
104
Voted
ICCAD
2006
IEEE
122views Hardware» more  ICCAD 2006»
16 years 11 days ago
Network coding for routability improvement in VLSI
With the standard approach for establishing multicast connections over a network, network nodes are utilized to forward and duplicate the packets received over the incoming links....
Nikhil Jayakumar, Sunil P. Khatri, Kanupriya Gulat...
113
Voted
FMCAD
2009
Springer
15 years 10 months ago
Scaling VLSI design debugging with interpolation
—Given an erroneous design, functional verification returns an error trace exhibiting a mismatch between the specification and the implementation of a design. Automated design ...
Brian Keng, Andreas G. Veneris
ISCAS
2008
IEEE
144views Hardware» more  ISCAS 2008»
15 years 10 months ago
A novel VLSI iterative divider architecture for fast quotient generation
—In this paper, a novel VLSI iterative divider architecture for fast quotient generation that is based on radix-2 non-restoring division is proposed. To speed up the quotient gen...
Tso-Bing Juang, Sheng-Hung Chen, Shin-Mao Li
112
Voted
AHS
2006
IEEE
109views Hardware» more  AHS 2006»
15 years 9 months ago
VLSI Design IP Protection: Solutions, New Challenges, and Opportunities
It has been a decade since the need of VLSI design intellectual property (IP) protection was identified [1,2]. The goals of IP protection are 1) to enable IP providers to protect ...
Lin Yuan, Gang Qu, Lahouari Ghouti, Ahmed Bouridan...