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VTS
1999
IEEE
88views Hardware» more  VTS 1999»
15 years 8 months ago
Multiple Design Error Diagnosis and Correction in Digital VLSI Circuits
Andreas G. Veneris, Ibrahim N. Hajj, Srikanth Venk...
98
Voted
ICPADS
1998
IEEE
15 years 8 months ago
A Parallel Parsing VLSI Architecture for Arbitrary Context Free Grammars
Andrew Koulouris, Nectarios Koziris, Theodore Andr...
115
Voted
ITC
1998
IEEE
120views Hardware» more  ITC 1998»
15 years 8 months ago
Test generation in VLSI circuits for crosstalk noise
This paper addresses the problem of efficiently and accurately generating two-vector tests for crosstalk induced effects, such as pulses, signal speedup and slowdown, in digital c...
Weiyu Chen, Sandeep K. Gupta, Melvin A. Breuer
ITC
1998
IEEE
68views Hardware» more  ITC 1998»
15 years 8 months ago
A tree-structured LFSR synthesis scheme for pseudo-exhaustive testing of VLSI circuits
Wen-Ben Jone, Jiann-Chyi Rau, Shih-Chieh Chang, Yu...
113
Voted
ICCAD
1997
IEEE
99views Hardware» more  ICCAD 1997»
15 years 8 months ago
High-level area and power estimation for VLSI circuits
High-level power estimation, when given only a high-level design specification such as a functional or RTL description, requires high-level estimation of the circuit average acti...
Mahadevamurty Nemani, Farid N. Najm