An ultra-low area, current efficient voltage regulator appropriate for distributed point-of-load voltage regulation in high performance integrated circuits (ICs) is described in t...
In this paper, capacitive 4-PWAM transmitter architectures and circuits are proposed and its performances are analyzed with random jitter and PVT variation comparing with other wo...
A compact delay model for series connected MOSFETs has been derived. This model enables accurate prediction of worst-case delay of different logic families such as dynamic logic. ...
This paper presents an FPGA-based implementation of a co-processing unit able to parse context-free grammars of real-life sizes. The application elds of such a parser range from p...
Cristian Ciressan, Eduardo Sanchez, Martin Rajman,...