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GLVLSI
2010
IEEE
234views VLSI» more  GLVLSI 2010»
15 years 9 months ago
On-chip point-of-load voltage regulator for distributed power supplies
An ultra-low area, current efficient voltage regulator appropriate for distributed point-of-load voltage regulation in high performance integrated circuits (ICs) is described in t...
Selcuk Kose, Eby G. Friedman
GLVLSI
2010
IEEE
189views VLSI» more  GLVLSI 2010»
15 years 9 months ago
8Gb/s capacitive low power and high speed 4-PWAM transceiver design
In this paper, capacitive 4-PWAM transmitter architectures and circuits are proposed and its performances are analyzed with random jitter and PVT variation comparing with other wo...
Young Bok Kim, Yong-Bin Kim, Fabrizio Lombardi
GLVLSI
2002
IEEE
123views VLSI» more  GLVLSI 2002»
15 years 9 months ago
Power and CAD considerations for the 1.75mbyte, 1.2ghz L2 cache on the alpha 21364 CPU
Joel Grodstein, Rachid Rayess, Tad Truex, Linda Sh...
GLVLSI
2002
IEEE
122views VLSI» more  GLVLSI 2002»
15 years 9 months ago
A compact delay model for series-connected MOSFETs
A compact delay model for series connected MOSFETs has been derived. This model enables accurate prediction of worst-case delay of different logic families such as dynamic logic. ...
Kaveh Shakeri, James D. Meindl
FCCM
2000
IEEE
83views VLSI» more  FCCM 2000»
15 years 8 months ago
An FPGA-Based Coprocessor for the Parsing of Context-Free Grammars
This paper presents an FPGA-based implementation of a co-processing unit able to parse context-free grammars of real-life sizes. The application elds of such a parser range from p...
Cristian Ciressan, Eduardo Sanchez, Martin Rajman,...