Sciweavers

2449 search results - page 162 / 490
» VLSI
Sort
View
GLVLSI
2003
IEEE
239views VLSI» more  GLVLSI 2003»
15 years 9 months ago
CMOS flash analog-to-digital converter for high speed and low voltage applications
A CMOS flash analog-to-digital converter (ADC) designed for high speed and low voltage is presented. Using the Threshold Inverter Quantization (TIQ) comparator technique, a flas...
Jincheol Yoo, Kyusun Choi, Jahan Ghaznavi
GLVLSI
2010
IEEE
139views VLSI» more  GLVLSI 2010»
15 years 9 months ago
Dynamically resizable binary decision diagrams
We present the architecture of a new Ordered Binary Decision Diagram library that is designed from the ground up to be space efficient. The main novelty lies in the library’s no...
Stergios Stergiou, Jawahar Jain
GLVLSI
2010
IEEE
138views VLSI» more  GLVLSI 2010»
15 years 9 months ago
Methodology to achieve higher tolerance to delay variations in synchronous circuits
A methodology is proposed for designing robust circuits exhibiting higher tolerance to process and environmental variations. This higher tolerance is achieved by exploiting the in...
Emre Salman, Eby G. Friedman
APCCAS
2002
IEEE
100views Hardware» more  APCCAS 2002»
15 years 9 months ago
On three-dimensional layout of pyramid networks
The pyramid networks are well-known as suitable structures for parallel computations such as image processing. This paper shows a practical 3D VLSI layout of the N-vertex pyramid ...
T. Yamada, N. Fujii, S. Ueno
DATE
2002
IEEE
103views Hardware» more  DATE 2002»
15 years 9 months ago
Communication Mechanisms for Parallel DSP Systems on a Chip
We consider the implication of deep sub-micron VLSI technology on the design of communication frameworks for parallel DSP systems-on-chip. We assert that distributed data transfer...
Joseph Williams, Nevin Heintze, Bryan D. Ackland