2449 search results - page 166 / 490 » VLSI |
114
click to vote
GLVLSI
1999
IEEE
15 years 8 months ago
1999
IEEE
This paper describes the designs of a saturating adder, multiplier, single MAC unit, and dual MAC unit with one cycle latencies. The dual MAC unit can perform two saturating MAC o...
145
click to vote
GLVLSI
1999
IEEE
15 years 8 months ago
1999
IEEE
This paper presents a method for synthesizing lookup table (LUT) networks. The strategy employed by our method is very different from the strategies of previous methods; many deco...
117
click to vote
ICCD
1999
IEEE
15 years 8 months ago
1999
IEEE
ions", in IEEE Transactions on CAD of VLSI, 25(3):403-412, March, 2006. , E. Mercer, C. Myers, "Modular Verification of Timed Systems Using Automatic Abstraction" in...
124
click to vote
MSE
1999
IEEE
15 years 8 months ago
1999
IEEE
This paper presents a PC based software running on PC dedicated to the training in sub-micron CMOS VLSI design. The software firstly consists in a HDL-based schematic editor with ...
129
click to vote
VLSID
1999
IEEE
15 years 8 months ago
1999
IEEE
Residue Number System based applications involve modulo-arithmetic which is typically implemented using look-up-tables (LUTs) for a small value of modulus. In this paper, we prese...