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GLVLSI
1998
IEEE
129views VLSI» more  GLVLSI 1998»
15 years 8 months ago
Stochastic Evolution Algorithm For Technology Mapping
A new technology mapper SELF-Map for LookUp Table LUT based Field Programmable Gate Arrays FPGAs is described. SELF-Map is based on the Stochastic Evolution SE algorithm. The stat...
Ahmad S. Al-Mulhem, Alaaeldin Amin, Habib Youssef
GLVLSI
1998
IEEE
119views VLSI» more  GLVLSI 1998»
15 years 8 months ago
A Combined Interval and Floating Point Multiplier
Interval arithmetic provides an e cient method for monitoring and controlling errors in numerical calculations. However, existing software packages for interval arithmetic are oft...
James E. Stine, Michael J. Schulte
DFT
1997
IEEE
141views VLSI» more  DFT 1997»
15 years 8 months ago
Analysis of a Hybrid Defect-Tolerance Scheme for High-Density Memory ICs
Recent increases in the density and size of memory ICs made it ne cessary to search for new defect tolerance techniques since the traditional methods are no longer e ective enough...
Israel Koren, Zahava Koren
VLSID
1997
IEEE
109views VLSI» more  VLSID 1997»
15 years 8 months ago
Delay-Insensitive Carry-Lookahead Adders
Integer addition is one of the most important operations in digital computer systems because the performance of processors is significantly influenced by the speed of their adde...
Fu-Chiung Cheng, Stephen H. Unger, Michael Theobal...
VLSID
1997
IEEE
106views VLSI» more  VLSID 1997»
15 years 8 months ago
Low-Power Configurable Processor Array for DLMS Adaptive Filtering
I n this paper, we first present a pipelined delayed least mean square (DLMS) adaptive filter architecture whose power dissipation meets a specified budget. This low-power archite...
S. Ramanathan, V. Visvanathan