2449 search results - page 172 / 490 » VLSI |
135
Voted
FCCM
2004
IEEE
15 years 7 months ago
2004
IEEE
This paper describes the package of test bench code required to verify the Algotronix' AES IP Core. Several authors (see the references in [3]) have published papers detailing...
141
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FCCM
2006
IEEE
15 years 7 months ago
2006
IEEE
This paper presents a technique for efficiently generating random numbers from a given probability distribution. This is achieved by using a generic hardware architecture, which t...
148
Voted
GECCO
2000
Springer
15 years 7 months ago
2000
Springer
Sequencing problems have to be solved very often in VLSI CAD. To obtain results of high quality, Evolutionary Algorithms (EAs) have been successfully applied in many cases. Howeve...
129
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ARVLSI
1995
IEEE
15 years 7 months ago
1995
IEEE
A new method of retiming plesiochronous data is described. This method features latency of less than a cell-time and requires only minimal support circuitry. No flow control or ha...
110
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ASPDAC
2008
ACM
15 years 6 months ago
2008
ACM
As VLSI fabrication technology progresses to 65nm feature sizes and smaller, transistors no longer operate as ideal switches. This motivates the verification of digital circuits us...