2449 search results - page 177 / 490 » VLSI |
127
Voted
ISCAS
1999
IEEE
15 years 8 months ago
1999
IEEE
High-level power design presents a complex, multiobjective problem that involves the simultaneous optimisation of competing criteria such as speed, area and power. It is difficult...
103
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VLSID
1999
IEEE
15 years 8 months ago
1999
IEEE
To reduce manufacturing variation due to chemicalmechanical polishing and to improve yield, layout must be made uniform with respect to density criteria. This is achieved by layou...
149
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VLSID
1997
IEEE
15 years 8 months ago
1997
IEEE
The problem of test generation belongs to the class of NP-complete problems and it is becoming more and more di cult as the complexity of VLSI circuits increases, and as long as e...
143
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GLVLSI
2007
IEEE
15 years 8 months ago
2007
IEEE
This paper describes a formal verification methodology of highnthesis (HLS) process. The abstraction level of the input to HLS is so high compared to that of the output that the v...
142
Voted
GLVLSI
2009
IEEE
15 years 8 months ago
2009
IEEE
Design debug remains one of the major bottlenecks in the VLSI design cycle today. Existing automated solutions strive to aid engineers in reducing the debug effort by identifying ...