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GLVLSI
2007
IEEE
115views VLSI» more  GLVLSI 2007»
15 years 10 months ago
Novel architectures for efficient (m, n) parallel counters
Parallel counters are key elements in many arithmetic circuits, especially fast multipliers. In this paper, novel architectures and designs for high speed, low power (3, 2), (7, 3...
Sreehari Veeramachaneni, Lingamneni Avinash, Kirth...
GLVLSI
2007
IEEE
164views VLSI» more  GLVLSI 2007»
15 years 10 months ago
Active bank switching for temperature control of the register file in a microprocessor
An effective thermal management scheme, called active bank switching, for temperature control in the register file of a microprocessor is presented. The idea is to divide the phys...
Kimish Patel, Wonbok Lee, Massoud Pedram
GLVLSI
2007
IEEE
162views VLSI» more  GLVLSI 2007»
15 years 10 months ago
Design of an UHF RFID transponder for secure authentication
RFID technology increases rapidly its applicability in new areas of interest without guaranteeing security and privacy issues. This paper presents a new architecture of an RFID tr...
Paolo Bernardi, Filippo Gandino, Bartolomeo Montru...
GLVLSI
2007
IEEE
139views VLSI» more  GLVLSI 2007»
15 years 10 months ago
Synthesis of irregular combinational functions with large don't care sets
A special logic synthesis problem is considered for Boolean functions which have large don’t care sets and are irregular. Here, a function is considered as irregular if the inpu...
Valentin Gherman, Hans-Joachim Wunderlich, R. D. M...
ISCAS
2007
IEEE
114views Hardware» more  ISCAS 2007»
15 years 10 months ago
A Spike-Based Saccadic Recognition System
Abstract— We present a spike-based saccadic recognition system that uses a temporal-derivative silicon retina on a pan-tilt unit and an aVLSI multi-neuron classifier with a time...
Matthias Oster, Patrick Lichtsteiner, Tobi Delbr&u...