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GLVLSI
2006
IEEE
115views VLSI» more  GLVLSI 2006»
15 years 10 months ago
Yield enhancement of asynchronous logic circuits through 3-dimensional integration technology
This paper presents a systematic design methodology for yield enhancement of asynchronous logic circuits using 3-D (3-Dimensional) integration technology. In this design, the targ...
Song Peng, Rajit Manohar
GLVLSI
2006
IEEE
98views VLSI» more  GLVLSI 2006»
15 years 10 months ago
Rapid intermodulation distortion estimation in fully balanced weakly nonlinear Gm-C filters using state-space modeling
State-space modeling of fully differential Gm-C filters with weak nonlinearities is used to develop a fast algorithm for intermodulation distortion estimation. It results in sim...
Paul Sotiriadis, Abdullah Celik, Zhaonian Zhang
GLVLSI
2006
IEEE
105views VLSI» more  GLVLSI 2006»
15 years 10 months ago
A practical approach for monitoring analog circuits
Formal methods have been advocated for the verification of digital design where correctness is proved mathematically. In contrast to digital designs, the verification of analog ...
Mohamed H. Zaki, Sofiène Tahar, Guy Bois
ISCAS
2006
IEEE
103views Hardware» more  ISCAS 2006»
15 years 10 months ago
A neural model for sonar-based navigation in obstacle fields
— The rapid control of sonar-guided vehicles through obstacle fields has been a goal of robotics for decades. How sensory data is represented strongly affects how obstacles and g...
Timothy K. Horiuchi
ISCAS
2006
IEEE
97views Hardware» more  ISCAS 2006»
15 years 10 months ago
A zero-skipping multi-symbol CAVLC decoder for MPEG-4 AVC/H.264
—This paper presents a high-performance CAVLC decoding VLSI architecture for MPEG-4 AVC/H.264. Instead of just skipping zero block, the proposed design explores the features of C...
Guo-Shiuan Yu, Tian-Sheuan Chang