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75

GLVLSI
1999
IEEE

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A Multiple-Input Single-Phase Clock Flip-Flop Family

15 years 1 months ago

A Multiple-Input Single-Phase Clock Flip-Flop Family

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Richard F. Hobson, Allan R. Dyck

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50

GLVLSI
1999
IEEE

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Symbolic Multi-Level Verification of Refinement

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Symbolic Multi-Level Verification of Refinement

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Stefan Hendricx, Luc J. M. Claesen

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52

GLVLSI
1999
IEEE

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A 1.8V High Dynamic-Range CMOS High-Speed Four Quadrant Multiplier

15 years 1 months ago

A 1.8V High Dynamic-Range CMOS High-Speed Four Quadrant Multiplier

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Chi-Hung Lin, Mohammed Ismail

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51

GLVLSI
1999
IEEE

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Formal Verification of Tree-Structured Carry-Lookahead Adders

15 years 1 months ago

Formal Verification of Tree-Structured Carry-Lookahead Adders

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Sae Hwan Kim, Shiu-Kai Chin

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40

GLVLSI
1999
IEEE

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A Fully Pipelined, 700MBytes/s DES Encryption Core

15 years 1 months ago

A Fully Pipelined, 700MBytes/s DES Encryption Core

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Ihn Kim, Craig S. Steele, Jefferey G. Koller

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