Sciweavers

2449 search results - page 196 / 490
» VLSI
Sort
View
FCCM
2000
IEEE
103views VLSI» more  FCCM 2000»
15 years 8 months ago
A Networked FPGA-Based Hardware Implementation of a Neural Network Application
This paper describes a networked FPGA-based implementation of the FAST (Flexible Adaptable-Size Topology) architecture, a Arti cial Neural Network (ANN) that dynamically adapts it...
Héctor Fabio Restrepo, Ralph Hoffmann, Andr...
FCCM
2000
IEEE
105views VLSI» more  FCCM 2000»
15 years 8 months ago
A Communication Scheduling Algorithm for Multi-FPGA Systems
For multiple FPGA systems, the limited number of I/O pins causes many problems. To solve these problems, efficient communication scheduling among FPGAs is crucial for obtaining hi...
Jinwoo Suh, Dong-In Kang, Stephen P. Crago
FCCM
2000
IEEE
114views VLSI» more  FCCM 2000»
15 years 8 months ago
Tunable Fault Tolerance for Runtime Reconfigurable Architectures
Fault tolerance is becoming an increasingly important issue, especially in mission-critical applications where data integrity is a paramount concern. Performance, however, remains...
Steven K. Sinha, Peter Kamarchik, Seth Copen Golds...
GLVLSI
2000
IEEE
95views VLSI» more  GLVLSI 2000»
15 years 8 months ago
MCM placement using a realistic thermal model
— Typically, placement algorithms attempt to minimize the total net length of a printed circuit board (PCB). However, an MCM’s increased throughput and dense circuitry can easi...
Craig Beebe, Jo Dale Carothers, Alfonso Ortega
GLVLSI
2000
IEEE
69views VLSI» more  GLVLSI 2000»
15 years 8 months ago
Supporting system-level power exploration for DSP applications
System-level power exploration requires tools for estimation of the overall power consumed by a system, as well as a detailed breakdown of the consumption of its main functional b...
Luca Benini, Marco Ferrero, Alberto Macii, Enrico ...