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VLSID
2010
IEEE
202views VLSI» more  VLSID 2010»
15 years 2 months ago
Processor Architecture Design Using 3D Integration Technology
The emerging three-dimensional (3D) chip architectures, with their intrinsic capability of reducing the wire length, is one of the promising solutions to mitigate the interconnect...
Yuan Xie
VLSID
2010
IEEE
200views VLSI» more  VLSID 2010»
15 years 2 months ago
Pinpointing Cache Timing Attacks on AES
The paper analyzes cache based timing attacks on optimized codes for Advanced Encryption Standard (AES). The work justifies that timing based cache attacks create hits in the fi...
Chester Rebeiro, Mainack Mondal, Debdeep Mukhopadh...
VLSI
2010
Springer
15 years 2 months ago
Trends and techniques for energy efficient architectures
Abstract--Microprocessor architectures have become increasingly power limited in recent years. Currently power and thermal envelopes dictate peak performance limits more than any o...
Victor Jimenez, Roberto Gioiosa, Eren Kursun, Fran...
FCCM
2009
IEEE
170views VLSI» more  FCCM 2009»
15 years 2 months ago
Generic Software Framework for Adaptive Applications on FPGAs
Adaptive systems are set to become more mainstream, as numerous practical applications in the communications domain emerge. FPGAs offer an ideal implementation platform, combining...
Suhaib A. Fahmy, Jorg Lotze, Juanjo Noguera, Linda...
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VLSI
2010
Springer
14 years 11 months ago
Local Biasing and the Use of Nullator-Norator Pairs in Analog Circuits Designs
Although local biasing of components used in an analog circuit is shown to be a very attractive design methodology, significantly simplifying the design procedure [3], it makes the...
Reza Hashemian