2449 search results - page 221 / 490 » VLSI |
148
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VLSID
2002
IEEE
16 years 6 months ago
2002
IEEE
We present a mathematical model for the problem of scheduling tests for core-based system-on-chip (SOC) VLSI designs. Given a set of tests for each core in the SOC and a set of te...
174
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EDBT
2010
ACM
16 years 19 days ago
2010
ACM
In line with the insight that “one size” of databases will not fit all application needs [19], the database community is currently exploring various alternatives to commodity...
174
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GLVLSI
2009
IEEE
16 years 16 days ago
2009
IEEE
The sequential depth determines the completeness of bounded model checking in design verification. Recently, a SATbased method is proposed to compute the sequential depth of a de...
160
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GLVLSI
2009
IEEE
16 years 16 days ago
2009
IEEE
Clock distribution networks are an important design issue that is highly dependent on delay variations and load imbalances, while requiring power efficiency. Existing mesh solutio...
164
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GLVLSI
2009
IEEE
16 years 16 days ago
2009
IEEE
In the context of nanoscale networks-on-chip (NoCs), each link implementation solution is not just a specific synthesis optimization technique with local performance and power im...