2449 search results - page 228 / 490 » VLSI |
143
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GLVLSI
2007
IEEE
16 years 5 days ago
2007
IEEE
The path-delay fault simulation of functional tests on complex circuits such as current processor-based systems is a daunting task. The amount of computing power and memory needed...
177
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ISQED
2007
IEEE
16 years 3 days ago
2007
IEEE
Due to the roaring power dissipation and gaining popularity of 3D integration, thermal dissipation has been a critical concern of modern VLSI design. The availability for chip-lev...
151
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ISVLSI
2007
IEEE
16 years 3 days ago
2007
IEEE
— Chemical-Mechanical Polishing (CMP) is one of the key steps during nanometer VLSI manufacturing process where minimum variation of layout pattern densities is desired. This pap...
149
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VLSI
2007
Springer
15 years 12 months ago
2007
Springer
System design complexity is growing rapidly. As a result, current development costs are constantly increasing. It is becoming increasingly difficult to estimate how much time it ...
159
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VLSI
2007
Springer
15 years 12 months ago
2007
Springer
— Software simulation remains the most used method for VHDL RTL functional verification. The functional verification process essentially consists of two parts. The first one is t...